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With the help of the all-new AMD Alveo ™ V80 computing accelerator card releases computing power

Date: May 17, 2024Views:

For large-scale data processing, optimal performance depends not only on raw computing power, but also on high memory bandwidth. Therefore, the all-new AMD Alveo ™  The V80 computing accelerator card is designed specifically for memory limited applications with large datasets, which require FPGA hardware flexibility to optimize workloads. The Alveo V80 accelerator card has now been mass-produced and shipped, which can provide up to twice the bandwidth and computing density compared to the previous generation accelerator card ①, and is suitable for use with AMD Vivado ™  FPGA designers of the design suite provide a simplified development process.

This new accelerator card features full height and 3/4 length (FH ¾ L) Size specifications, by AMD Versal ™  HBM adaptive SoC provides support with an FPGA architecture of 2600000 LUT logic units, 10848 DSP computing logic chips, and 820 GB/s memory bandwidth, helping to overcome performance bottlenecks.


Compared with its predecessor, the AMD Alveo U55C computing accelerator card, the Alveo V80 has a logic density that can be up to double, storage bandwidth that can be up to double, and network bandwidth that can be up to 4 times. It can achieve a powerful computing cluster while also optimizing the number of cards, servers, and rack space.


A network attached accelerator card specifically designed for large datasets and memory intensive workloads


The hardware flexibility of the Alveo V80 card allows for a wide range of applications across different custom workloads. As a 4x200G network attached acceleration card, this card can process large amounts of incoming data in real time, avoiding PCIe encountered by GPUs ®  Connection restrictions.

The Alveo V80 accelerator card can be extended to hundreds of nodes through Ethernet to achieve computing clusters, making it ideal for a range of high-performance computing applications, including genome sequencing, molecular dynamics, and sensor processing. In terms of network security, the built-in 400G encryption engine and 600G Ethernet hard block, combined with the hardware flexibility of FPGA, make the Alveo V80 accelerator suitable for line speed packet detection and AI supported anomaly detection.


This accelerator card is also very suitable for computing storage and data analysis, and can integrate compression and query acceleration on the same card, thereby increasing effective storage capacity and gaining insights faster. In addition, it is also suitable for various fintech applications, including strategy backtesting, option pricing, and financial modeling and simulation.


Case: A leap in astrophysical calculations


The Commonwealth Scientific and Industrial Research Organization (CSIRO) is a national research organization in Australia that participated in the construction of the world's largest radio astronomy antenna array. The antenna array currently contains 420 Alveo U55C accelerator cards for processing radio waves to study the early universe and explore galaxy evolution.


CSIRO plans to use Alveo V80 accelerator cards to reduce board area and cost, and reduce the number of required accelerator cards by up to 66%, while also dealing with new signal processing tasks from 131000 telescopes. Considering the potential reduction in card, server, rack space, and power consumption, the leap in computing power per card is expected to bring a total cost of ownership (TCO) reduction of up to 20%.


Grant Hampson, a research engineer at CSIRO's Department of Space and Astronomy, said, "We initially adopted the Alveo product line because it can process large amounts of sensor data in real-time. For our next-generation beamformer and correlator, reducing total cost of ownership is imperative. The Alveo V80 accelerator card is a technological leap from the previous generation Alveo U55C card, providing a compact and energy-saving solution with an economically efficient footprint."

Simplify development for FPGA designers


The Alveo V80 accelerator card, designed through the Alveo Versal Example Design (AVED), is fully usable by traditional hardware developers and is now available on GitHub. AVED simplifies hardware startup using traditional FPGA and RTL processes, and is based on common Vivado tool processes. The example design adopts a pre built subsystem implemented on AMD Versal Adaptive SoC specifically designed for the Alveo V80 accelerator card, providing an efficient starting point.


At the system level, the Alveo V80 computing accelerator simplifies system integration and provides a fast production path. By using pre validated deployment cards, design teams can avoid PCB integration, inventory management, and product lifecycle management tasks.


Shipped now


Alveo V80 has been put into mass production and can now be purchased from AMD and authorized dealers. Please visit www.amd.com/v80 to learn how the new accelerator card redefines calculations for your infrastructure; Read the product introduction and data overview for detailed specifications, or contact experts for more information.


① Based on the specifications published in the AMD Alveo product selection guide as of April 2024. (ALV-13).


② Based on an independent "early trial experience" performance and cost analysis conducted by CSIRO in October 2023, a comparison was made between the existing implementation of 420 Alveo U55C accelerators and the expected implementation of 140 AMD Alveo V80 accelerators. The estimated total cost of ownership is calculated over a three-year period, including the estimated costs of electricity and cooling operating expenses. All performance and cost savings statements are estimates provided by CSIRO and have not been validated by AMD. Performance and cost-effectiveness are influenced by various assumptions and variables, and may vary based on system configuration and other factors. The results are only applicable to CSIRO and may not be typical. For more detailed information, please refer to Figure (3) (ALV-16).

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